SystemVerilog for Design Second Edition: A Guide to Using SystemVerilog for Hardware Design and Modeling 2nd Edition

I am using the book and getting value from it. the examples are not complete, but in a week I have scanned the book and had it open to review several times a day as I write and debug code.On choosing which books to get to start with System Verilog: This one is focused on design, so has pointers on synthesizable descriptions and types. If you are doing verification you need both this and its companion,  SystemVerilog for Verification: A Guide to Learning the Testbench Language Features  by Chris SpearYou also need a verilog starter book, I may come back with an update on a recommendation.

This review is on the Kindle edition of the book and not on the content of the book.The Kindle edition of this book is one of the worst Kindle books productions that I have ever used....and I own over a dozen Kindle tech books. The blocks of text that describe some aspect of the SV spec are tiny and don't seem to respond to text changes. The text that's not in the blocks is huge - it responds to text size changes but, even then, the words are often hard to read...I've seen photocopies with better resolution. I have tried this ebook an a Kindle Fire and on a Nexus 7 tablet using the Kindle reader an the result is the same. At over $120 for the Kindle version this production is a travesty. Amazon and Springer Verlag you should be ashamed.

Not going to be elaborate on this review. Its a book not for beginners but for people who know SV and are already doing design. provides many case studies with examples. I wouldn't say this is a "must" book but its very well a good book.

If you want to learn the language, you should refer to SystemVerilog for Verification: A Guide to Learning the Testbench Language FeaturesIf you want to learn RTL using the language, yes it's for you.

Great book. However, like all technical books it is a little pricey.

This book is great for anyone who knows Verilog and wants to learn the design side of SystemVerilog. The book is very detailed but also easy to read. I strongly recommend it for all RTL designers and Architects who want to learn SV.

For an engineer that knows Verilog, this is the go-to guide to bring you up to speed with SystemVerilog.

Good and fast.